Currently, CMOS imagers are well known in the art and are implemented in many different applications. One of the primary areas that CMOS imagers can be found is in portable applications such as digital cameras that use battery power. It is therefore very desirable to have a CMOS imager that is powered with a low supply voltage, for example one volt (1V).
Having a voltage this low, however, leads to a number of problems. For one, the quantization values of an imager become very small. For example, a typical CMOS imager might use 8 bits of resolution and have a supply voltage of 3.3 volts. This leads to a quantization level of 3.3V/256=12.9 mV. If an imager is implemented with a one volt supply and 8 bits of resolution then the quantization level is 1V/256=3.9 mV. The proportion of noise relative to this low quantization value becomes very large and has a greater impact on the output.
Another problem involves the pixel structure that is used in most CMOS imagers, namely using 3 n-type MOS transistors with a photodiode. The pixel consists of a precharge transistor, a source follower amplifying transistor and an access transistor. When the pixel is precharged to the supply voltage, one threshold voltage, Vt, is lost through the precharge transistor. Once the pixel is exposed to light and the output is being read out to the column, another Vt is lost through the source follower amplifying transistor. A typical Vt for MOS transistors is 0.07 V, leaving a maximum voltage output to the column of 0.86V (1V-2*0.07V), further limiting the quantization levels. FIG. 1 illustrates column voltage output from a typical 3-transistor CMOS pixel versus integration time. The maximum voltage that can be red out to the column is Vsupply-2*Vt. During the integration time tint, if the light on the pixel is sufficiently intense, the photodiode saturates and the voltage on the column is goes to zero.
Quantizing the output from the pixels into digital data for the Digital Signal Processor (DSP) may be carried out in a number of known ways. Correlated Double Sampling (CDS) quantizes the output of the column signal twice, once at the beginning of the integration period and once at the end. From these two samples the DSP calculates the slope of the pixel output to determine the brightness of the pixel. This method is highly susceptible to noise and as a result of the high noise to quantization level ratio can be very inaccurate in a low voltage CMOS imager. Also, by using only two points to calculate the slope of the pixel output there is no accounting for a saturated pixel. Any pixels that saturate at different times in the integration period are all calculated as having the same slope, and thus all those pixels are considered to have the same value.
Successive approximation is another method of converting the analog output from the pixel into a digital signal. In this system the output at the end of the integration period is successively compared to different threshold levels, each representing one bit of resolution of the final output. The thresholds are created through capacitors that must be sized in precise ratios (C, ½C, ¼C, etc.) which is both difficult to implement and also occupies a large amount of space. Also, the capacitors on every column across the array must be matched with one another for consistent results, which is not always attainable due to process impurities. The problem of noise is a large factor in successive approximation, as both the small quantization levels to noise ratio as well as capacitance noise, which is larger in small capacitors, will accumulate to yield inaccurate results. Successive approximation also does not directly account for the problem of threshold voltage loss through the pixel transistors. Finally, successive approximation takes a single sample at the end of the integration period and therefore, has no way of differentiating between pixels that saturate at different times throughout the integration period.
Therefore, there is a need for an efficient method and apparatus that is suited to low voltage imagers for processing the pixel output signals at the column level.